Kerncraft is a loop kernel analysis and performance modeling toolkit. It allows automatic analysis of loop kernels using the Execution Cache Memory (ECM) model and the Roofline model, and their validation via actual benchmarks. Kerncraft provides a framework for investigating the data reuse and cache requirements by static code analysis. In combination with the Intel IACA tool or our own OSACA tool (see below), kerncraft can give a good overview of both in-core and memory bottlenecks and use that data to construct predictive, white-box performance models. In case of stencil codes it can use its built-in layer condition analyzer to automatically generate tuning advice, i.e., determine favorable loop blocking factors in order to reduce the code balance. Kerncraft contains a python-based cache hierarchy simulator that is also available as a standalone tool.
Main developer: Julian Hammer (HPC group @ FAU)
- J. Hammer, J. Hornich, G. Hager, T. Gruber, and G. Wellein: INSPECT Intranode Stencil Performance Evaluation Collection. Poster at SC19.
- J. Hornich, J. Hammer, G. Hager, T. Gruber, and G. Wellein: Collecting and Presenting Reproducible Intranode Stencil Performance: INSPECT. Supercomputing Frontiers and Innovations 6(3), 4-25 (2019). ISSN 2313-8734, DOI: 10.14529/jsfi190301
- J. Hammer: Out of Order Instruction Benchmarking Framework on the Back of Dragons. Poster in the ACM Student Research Competition at SC18.
- J. Hammer, J. Eitzinger, G. Hager, and G. Wellein: Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels. In: Niethammer C., Gracia J., Hilbrich T., Knüpfer A., Resch M., Nagel W. (eds), Tools for High Performance Computing 2016, ISBN 978-3-319-56702-0, 1-22 (2017). Proceedings of IPTW 2016, the 10th International Parallel Tools Workshop, October 4-5, 2016, Stuttgart, Germany. Springer, Cham. DOI: 10.1007/978-3-319-56702-0_1, Preprint: arXiv:1702.04653
- J. Hammer: Performance Modeling and Engineering with Kerncraft. Poster in the ACM Student Research Competition and ACM SRC runner-up at SC16.